Retention improvement in vertical NAND flash memory using block soft erase scheme

Abstract

We propose a block soft erase method to enhance the retention characteristics of vertical NAND (V-NAND) flash memory while significantly reducing soft erase time. Unlike prior incremental-step-pulse-erasing-based approaches that adjust each cell individually, the proposed method applies a single soft erase pulse to all cells simultaneously. Experimental results using commercial triple-level-cell V-NAND flash memory show that the block soft erase method enables Vth tuning across multiple program-verify levels (PVs), even under cell-to-cell variation due to word-line position and string differences. Retention characteristics measured at 85 °C demonstrated a 21.6% improvement at PV7 after 104 s.