Reduction of hole traps in GaN MOS structures by high-pressure oxygen annealing

Abstract

The impact of annealing pressure on hole traps in SiO2/p-type GaN metal-oxide-semiconductor (MOS) structures was investigated. The density of fast-response interface hole traps (Nhump) was characterized from a hump in capacitance–voltage (C–V) characteristics of the MOS capacitors. Nhump was below 2×1012 cm−2 and was almost unchanged at 200–800 °C when annealed under 100 MPa, while atmospheric-pressure annealing at a higher temperature led to a higher Nhump, exceeding 1×1013 cm−2 at 800 °C. When samples first annealed at 800 °C under atmospheric pressure were additionally annealed under 100 MPa, Nhump was reduced to about 2×1012 cm−2 regardless of the temperature of high-pressure annealing. Consequently, high-pressure oxygen annealing turned out to not only suppress the generation of interface hole traps but also reduce the traps once generated in GaN MOS structures.