Pt-MoS2/graphite heterostructure with asymmetric Schottky barriers for high-performance diodes and transistors

Abstract

Two-dimensional (2D) material-based devices hold significant promise for next-generation electronics, yet their performance is often compromised by interfacial defects, material degradation, and electrode incompatibility. In this work, we report a transistor featuring a MoS2/graphite heterojunction with a platinum (Pt) bottom source and a mechanically transferred graphite top drain electrode. This architecture preserves the structural integrity of MoS2 while optimizing interfacial properties. The device, fabricated via pre-patterned Pt deposition and sequential dry transfer of MoS2 and graphite, exhibits exceptional performance metrics: a rectification ratio exceeding 106, an ideality factor of ∼1.47, and a switching ratio of about 6 × 106 at room temperature. Energy band analysis reveals that rectification originates from asymmetric Schottky barriers at the MoS2/electrode interfaces, where negative drain–source bias enables carrier conduction, while positive bias blocks current via channel depletion. We demonstrate that Pt electrodes outperform Ag counterparts due to strategically engineered potential barriers that suppress electron leakage. Dynamic rectification measurements confirm reliability under switching cycles, enabling dual-mode functionality as a reconfigurable AND logic gate and an optoelectronic ternary-state output unit. This work establishes a scalable framework for high-frequency, energy-efficient nanoelectronics, effectively bridging the gap between the theoretical promise of 2D materials and their multifunctional practical applications.