Low-voltage multilevel van der Waals floating gate transistors enabled by ultrathin hafnia integration

Abstract

The reliable integration of high-κ dielectrics within van der Waals (vdW) heterostructures is essential for achieving low-power, high-performance nonvolatile floating gate transistors (FGTs). Here, we demonstrate fully functional vdW FGTs employing thermally oxidized hafnia HfOx from layered HfSe2 as both tunneling and control dielectric layers. A ∼5 nm-thick HfOx layer enables efficient Fowler–Nordheim tunneling at low bias, while a thicker layer of >10 nm serves as a robust gate dielectric, providing efficient gate controllability. The resulting FGTs can be operated with low voltages below 4 V, showing pronounced memory hysteresis, multilevel memory capability, and excellent data retention reaching 104 s. This work establishes a feasible strategy for integrating high-quality ultrathin oxides into 2D heterostructures, providing a promising route toward energy-efficient and high-density nonvolatile memory technologies.