High temperature complementary heterojunction tunnel field-effect transistors for low-power circuits

D Dongbeom Goo (Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,) G Ganghyeok Seo (Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,) H Hongsik Lim (Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,) U Uiyeon Won (Electronic Devices research Team, Hyundai motors group 2 , Uiwang,) J Jongseok Lee T Taehyeok Jin (Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,) K Kyunghwan Sung (Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,) T Taehun Lee (Division of Advanced Materials Engineering) J Jinkyu Kim (Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,) S Seok Lee (Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,) J Jaehyun Cho K Kenji Watanabe T Takashi Taniguchi S Sungjae Cho

Abstract

Tunnel field-effect transistor (TFET) is emerging as a promising alternative to overcome the thermionic limit of 60 mV/dec in subthreshold swing (SS) inherent to metal-oxide-semiconductor field-effect transistor through the band-to-band tunneling (BTBT) mechanism. TFET offers significant potential for applications in future industries, such as low-power sensors and wearable devices, where extreme energy efficiency is critical. Notably, due to the characteristic of the BTBT mechanism, TFET can maintain stable SS performance even at high temperature, enabling low-power operation under such condition. Although numerous theoretical predictions and simulations support this capability, experimental validation has not yet been demonstrated. As electric and autonomous vehicles advance, the demand for automotive semiconductors has increased, highlighting the importance of transistor technology that remains stable at high temperatures and consumes less power. Here, we report high temperature TFETs showing SS < 60 mV/dec through vertical heterojunction of two-dimensional semiconductors. n-TFET and p-TFET were implemented via BP-MoS2 and WSe2-ReS2 heterojunction, respectively. Both TFETs reached SSmin under 50 mV/dec at room temperature and maintained SS1dec_avg under 60 mV/dec up to 400 K. These findings pave the way for low-power circuits capable of operation in harsh environments.

Article Details

Volume / Issue Vol. 126, Issue 8
Published February 24, 2025
ISSN 0003-6951
Publisher American Institute of Physics

Journal Info

Applied Physics Letters

American Institute of Physics

ISSN: 0003-6951 Physical Sciences

Authors (14)

D

Dongbeom Goo

Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,

G

Ganghyeok Seo

Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,

H

Hongsik Lim

Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,

U

Uiyeon Won

Electronic Devices research Team, Hyundai motors group 2 , Uiwang,

J

Jongseok Lee

T

Taehyeok Jin

Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,

K

Kyunghwan Sung

Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,

T

Taehun Lee

Division of Advanced Materials Engineering

J

Jinkyu Kim

Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,

S

Seok Lee

Department of Physics, Korea Advanced Institute of Science and Technology (KAIST) 1 , Daejeon,

J

Jaehyun Cho

K

Kenji Watanabe

T

Takashi Taniguchi

S

Sungjae Cho