High-performance logic circuits based on Ag/ZnAl2O4/FTO resistive random-access memory devices

Z Zeren Rong (School of Integrated Circuits, Guangdong University of Technology 1 , Guangzhou 510006,) G Guoshu Dai (School of Integrated Circuits, Guangdong University of Technology 1 , Guangzhou 510006,) M Maocheng Liao (School of Integrated Circuits, Guangdong University of Technology 1 , Guangzhou 510006,) Y Yesi Lu (School of Integrated Circuits, Guangdong University of Technology 1 , Guangzhou 510006,) Z Zhengjie Zhou (Department of Medicine (T.-P.S., Z.Z., J.L., C.-F.Y., J.Z., R.-T.H., B.A.M., B.X., J. Lo, L.C., T.-H.L., D.H., Y.F.), University of Chicago, IL.) Y Yuxiang Xu (School of Integrated Circuits, Guangdong University of Technology 1 , Guangzhou 510006,) X Xiao-Lin Wang (School of Electrical and Information Engineering, Henan University of Engineering 2 , Zhengzhou 451191,) Z Zhen Liu

Abstract

Focusing on the in-memory computing application, this article proposes logic circuits based on Ag/ZnAl2O4/fluorine-doped tin oxide resistive random-access memory (RRAM) devices. The devices were fabricated via spin coating and inkjet printing, demonstrating bipolar resistive switching behaviors, along with excellent cycle endurance (>6000 cycles), long-term retention capacity (>5 × 104 s), and good uniformity. Furthermore, fundamental logic gates (NOR, AND, and XNOR gates) and an n-bit adder were implemented using these devices. To study their arithmetic performance and computational reliability, a non-ideal simulation model of the RRAM devices was developed. The computation success rate of the logic gates is confirmed to be greater than 99.96%. Notably, the proposed n-bit adder exhibits a small footprint (6n + 1 computing units) and low latency (2n + 8 clock cycles).

Article Details

Volume / Issue Vol. 128, Issue 11
Published March 16, 2026
ISSN 0003-6951
Publisher American Institute of Physics

Journal Info

Applied Physics Letters

American Institute of Physics

ISSN: 0003-6951 Physical Sciences

Authors (8)

Z

Zeren Rong

School of Integrated Circuits, Guangdong University of Technology 1 , Guangzhou 510006,

G

Guoshu Dai

School of Integrated Circuits, Guangdong University of Technology 1 , Guangzhou 510006,

M

Maocheng Liao

School of Integrated Circuits, Guangdong University of Technology 1 , Guangzhou 510006,

Y

Yesi Lu

School of Integrated Circuits, Guangdong University of Technology 1 , Guangzhou 510006,

Z

Zhengjie Zhou

Department of Medicine (T.-P.S., Z.Z., J.L., C.-F.Y., J.Z., R.-T.H., B.A.M., B.X., J. Lo, L.C., T.-H.L., D.H., Y.F.), University of Chicago, IL.

Y

Yuxiang Xu

School of Integrated Circuits, Guangdong University of Technology 1 , Guangzhou 510006,

X

Xiao-Lin Wang

School of Electrical and Information Engineering, Henan University of Engineering 2 , Zhengzhou 451191,

Z

Zhen Liu