Gate voltage-controlled magnetic anisotropy at the Pt-porphyrin functionalized graphene/NiFe interface
Abstract
We report a novel approach for engineering large voltage-controlled magnetic anisotropy (VCMA) and enhanced spin–orbit coupling (SOC) at the interface between single-layer graphene (SLG) and NiFe through non-covalent functionalization with platinum (II) 5,10,15,20-tetraphenyl porphyrin (Pt-porphyrin). Using chemical vapor grown SLG, we demonstrate that Pt-porphyrin functionalization significantly increases the SOC, and strong interfacial charge redistribution and orbital hybridization between functionalized graphene and ferromagnet enable robust voltage modulation of interfacial magnetic anisotropy, as confirmed by spin-torque ferromagnetic resonance measurements. A substantial VCMA coefficient of (ξ) 375.6 fJ V−1 m−1 is achieved, accompanied by an order-of-magnitude enhancement in spin-torque efficiency (θeff−sh) compared to pristine SLG. The resonance field exhibits a clear, reversible shift under applied gate voltage, confirming robust electric-field modulation of interfacial magnetic anisotropy. Raman and x-ray photoelectron spectroscopy confirm the structural integrity and effective charge transfer at the functionalized interface. Electrical characterization of back-gated graphene field-effect transistors further reveals tunable electronic properties upon functionalization. The functionalized interface remains chemically stable under ambient conditions and throughout device fabrication processes. Our results demonstrate that non-covalent functionalization of graphene with Pt-porphyrin induces a gate-tunable interfacial electronic reconstruction, which simultaneously enhances spin–orbit-mediated charge–spin conversion and VCMA in an adjacent ferromagnet. We believe this will provide a promising platform for scalable and energy-efficient memory and logic technologies.
Article Details
Journal Info
Applied Physics Letters
American Institute of Physics
Authors (6)
Ambika Shanker Shukla
Solid State Devices Group, Department of Electrical Engineering, Indian Institute of Technology Bombay 1 , Mumbai 400076,
Abhishek Erram
Solid State Devices Group, Department of Electrical Engineering, Indian Institute of Technology Bombay 1 , Mumbai 400076,
Heston Alfred Mendonca
Solid State Devices Group, Department of Electrical Engineering, Indian Institute of Technology Bombay 1 , Mumbai 400076,
Deepak Kumar
Akanksha Chouhan
Solid State Devices Group, Department of Electrical Engineering, Indian Institute of Technology Bombay 1 , Mumbai 400076,
Ashwin A. Tulapurkar
Solid State Devices Group, Department of Electrical Engineering, Indian Institute of Technology Bombay 1 , Mumbai 400076,