Enhanced polarization switching and reliability in BEOL-compatible HZO/ZrO2/HZO stack under low-voltage operation

Y Yinchi Liu (College of Integrated Circuits and Micro-Nano Electronics, Fudan University 1 , Shanghai 200433,) H Handong Zhu (College of Integrated Circuits and Micro-Nano Electronics, Fudan University 1 , Shanghai 200433,) X Xun Lu S Shiyu Li (Department of Gastroenterology, Shanghai Institute of Pancreatic Diseases, Changhai Hospital, Navy/Second Military Medical University) H Hao Zhang J Jining Yang Y Yeye Guo (College of Integrated Circuits and Micro-Nano Electronics, Fudan University 1 , Shanghai 200433,) Y Yanxi Li L Lin Chen S Shijin Ding (School of Microelectronics, Fudan University 2 , Shanghai 200433,) H Hongliang Lu (Intelligent Transportation Thrust, Systems Hub) W Wenjun Liu

Abstract

In this Letter, we demonstrate an enhanced switching speed of 589 ns and a superior double remanent polarization of 40.38 μC/cm2 under a low operating voltage of 2.0 V in the ferroelectric HZO/ZrO2/HZO stack compatible with the back-end of line process. This enhancement in ferroelectricity and switching speed is attributed to an improved fraction of FE phases and reduced domain pinning caused by the decreased oxygen vacancy in the HZO/ZrO2/HZO stack. The thermal instability of conventional HZO is evident in the dramatic slowdown of switching time from 2.6 to 21 μs and the pronounced domain pinning due to the oxygen vacancy aggregation as the temperature rises from 40 to 240 °C. Conversely, the HZO/ZrO2/HZO stack exhibits a switching time distribution ranging from 0.32 to 1.78 μs. Moreover, a wakeup ratio as low as ∼11.4% after cycling at 240 °C for 105 cycles under 2.0 V/500 kHz was achieved in the capacitor with the HZO/ZrO2/HZO stack film, outperforming the capacitor with conventional HZO at the same temperature. This improvement could be caused by the enhanced phase structure and suppressed oxygen vacancy generation. These findings offer a promising approach to improving the ferroelectricity and switching speed under a low operating voltage for applications in the back-end of line compatible nonvolatile memories.

Article Details

Volume / Issue Vol. 127, Issue 6
Published August 11, 2025
ISSN 0003-6951
Publisher American Institute of Physics

Journal Info

Applied Physics Letters

American Institute of Physics

ISSN: 0003-6951 Physical Sciences

Authors (12)

Y

Yinchi Liu

College of Integrated Circuits and Micro-Nano Electronics, Fudan University 1 , Shanghai 200433,

H

Handong Zhu

College of Integrated Circuits and Micro-Nano Electronics, Fudan University 1 , Shanghai 200433,

X

Xun Lu

S

Shiyu Li

Department of Gastroenterology, Shanghai Institute of Pancreatic Diseases, Changhai Hospital, Navy/Second Military Medical University

H

Hao Zhang

J

Jining Yang

Y

Yeye Guo

College of Integrated Circuits and Micro-Nano Electronics, Fudan University 1 , Shanghai 200433,

Y

Yanxi Li

L

Lin Chen

S

Shijin Ding

School of Microelectronics, Fudan University 2 , Shanghai 200433,

H

Hongliang Lu

Intelligent Transportation Thrust, Systems Hub

W

Wenjun Liu