Characterization of vertical AZO/p-GaN/n-GaN heterojunction bipolar transistor
Abstract
Vertical device architectures are attracting attention for power electronics applications owing to their high current capabilities and space-efficient layouts. In this study, we demonstrate a GaN-based vertical heterojunction bipolar transistor employing aluminum-doped zinc oxide (AZO) as the collector layer, deposited by radio frequency sputtering at a low temperature. This low-temperature process avoids thermal damage to the underlying p-GaN base layer and provides a fabrication-compatible route for device integration. Numerical simulations indicated that the AZO/p-GaN/n-GaN stack formed suitable band alignments to support transistor operation. The fabricated device showed current switching and amplification in the common-base configuration, while the common-emitter mode exhibited abnormal behavior caused by reverse leakage at the base–collector junction. These results confirm the viability of the low-temperature AZO-based approach and indicate its potential for integration into high-performance vertical high-power transistors.
Article Details
Journal Info
Applied Physics Letters
American Institute of Physics
Authors (8)
Sooyoung Kim
Goeun Bang
Department of Semiconductor Engineering, Tech University of Korea 2 , Siheung 15073,
Changyong Kim
Department of Semiconductor Engineering, Tech University of Korea 2 , Siheung 15073,
Taenam Kwon
Jongseob Kim
Samsung Electronics Co., Ltd. 3 , Yongin 17113,
Kyoung-Kook Kim
Dong Yeong Kim
Major of Semiconductor Engineering, Pukyong National University 2 , Busan 48513,
Jaehee Cho
School of Semiconductor and Chemical Engineering, Jeonbuk National University 1 , Jeonju 54896,