6-in. high-voltage GaN-based E-mode HEMTs with ultrathin barrier structures: Interface quality and its reliability

Abstract

In this Letter, high-voltage enhancement-mode (E-mode) GaN-based power devices were demonstrated by employing an ultrathin barrier epitaxial structure. We investigated the effects of interface states introduced by the barrier etching process on the devices' reliability by fabricating and comparing metal–insulator–semiconductor (MIS)-field effect transistors (FETs) without an AlGaN barrier layer and MIS-high electron mobility transistors (MIS-HEMTs) with a barrier layer. The threshold voltages (Vth) of the fabricated MIS-HEMT and MIS-FET reach 0.14 and 2.5 V, respectively. Meanwhile, the fabricated devices exhibited a high off-state breakdown voltage over 1500 V. Compared to high interface trap density (Dit) at the SiN/GaN interface of MIS-FET, a much lower Dit was found at the SiN/AlGaN interface of MIS-HEMT owing to the barrier recess-free process. Thus, the MIS-HEMT exhibits a negligible Vth shift tested via positive bias temperature instability, which is crucial in the practical application for the E-mode operation. Furthermore, a scheme of extracting the Dit of the devices from the flatband voltages (VFB) shift of C–V curves was developed, and the accuracy of the scheme was verified by multi-frequency C–V tests.