Layer-by-layer NH3 plasma treatment for area-selective atomic layer deposition of high-quality SiO2 thin films
Abstract
Area-selective atomic layer deposition (area-selective ALD) has been extensively studied because of its versatility in nanotechnological applications. The priority focus in area-selective ALD is to achieve the desired selectivity; thus, most studies to date have been concentrated on the reaction mechanism of ALD on growth/nongrowth substrates or the development of novel methodologies to resolve the challenges associated with its implementation in high-volume manufacturing. In this study, we performed area-selective ALD of SiO2 on SiO2, where SiO2 was not grown on SiNx, and suggested area-selective ALD approaches that could simultaneously enhance selectivity and film quality. An NH3 plasma treatment was applied to functionalize the SiNx surface with more Si–NH bonds, which exhibited low reactivity toward Si precursors. Although the SiO2 surface was also functionalized with Si–NH bonds, it was not fully converted into Si–NH because of its thermodynamic nature at low temperatures. Consequently, the results showed that NH3 plasma pretreatment was effective in increasing selectivity. Therefore, we performed a layer-by-layer NH3 plasma treatment during the ALD of SiO2 to deposit high-quality films without losing selectivity. The SiO2 film was densified, as confirmed by x-ray reflection spectra without nitrogen impurity incorporation. Electrical property measurements of metal–oxide–semiconductor capacitors confirmed that this approach enabled simultaneous selectivity and SiO2 film-quality enhancement.
Article Details
Journal Info
The Journal of Chemical Physics
American Institute of Physics
Authors (10)
Sanghun Lee
Seunggi Seo
School of Electrical and Electronic Engineering, Yonsei University 1 , 50 Yonsei-Ro, Seodaemun-Gu, Seoul 03722,
Tae Hyun Kim
Hwi Yoon
School of Electrical and Electronic Engineering, Yonsei University 1 , 50 Yonsei-Ro,Seodaemun-Gu, Seoul, 03722
Seonyeong Park
School of Electrical and Electronic Engineering, Yonsei University 1 , 50 Yonsei-Ro, Seodaemun-Gu, Seoul 03722,
Seunggyu Na
School of Electrical and Electronic Engineering, Yonsei University 1 , 50 Yonsei-Ro,Seodaemun-Gu, Seoul, 03722
Jeongwoo Seo
School of Electrical and Electronic Engineering, Yonsei University 1 , 50 Yonsei-Ro, Seodaemun-Gu, Seoul 03722,
Soo-Hyun Kim
Seung-min Chung
Department of Semiconductor Engineering, College of AI Convergence, Hoseo University 2 , 79 Hoseo-Ro, Baebang-Eup, Asan 31499,
Hyungjun Kim
Korea Advanced Institute of Science and Technology (KAIST) , , ,