Understanding the role of environment and dielectric capping on the electrical properties of WS2 monolayers grown by chemical vapor deposition technique

Abstract

Effect of the environmental conditions and dielectric capping on the electrical properties of monolayer (1L) WS2 films grown by the chemical vapor deposition technique is systematically studied. The characteristics of field effect transistors (FETs) fabricated on these films are investigated before and after capping the monolayer channels with Al2O3. 1L-WS2/SiO2/Si FETs under back-gated configuration show excellent performance with the on/off ratio reaching as high as 2 × 107, electron mobility of 26 cm2/V s, and subthreshold swings of 2.5 V/decade. Electron concentration (n) and mobility (μ) in the channel increase by several-folds after capping. To understand the effect, annealing experiments are carried out under vacuum and controlled environments of different gases on an uncapped device. The results point to the physisorption of oxygen molecules (O2) at the S-vacancy (VS) sites, which is the likely cause for the reduction of both n and μ of the uncapped monolayer. The study reveals that n and μ increase as a result of the removal of O2 from the VS-sites upon capping. Al2O3 capped FETs are also examined using top-gate configuration. Interestingly, mobility is found to reduce by an order of magnitude when measured using top-gate as compared to the back-gate configuration. This has been attributed to the gate-bias driven filling of the Al2O3/1L-WS2 interfacial traps acting as the carrier scattering centers. The Al2O3/1L-WS2 interface is found to offer higher density of traps than the SiO2/1L-WS2 interface. The study highlights the need of developing a comprehensive strategy to tackle the influence of intrinsic defects, adsorption, and interfacial traps induced by gate dielectric on the performance of 1L-WS2 based FETs.