Thermal strain management of III–V heterostructures grown on InP-on-silicon (InPoSi) substrates

Abstract

Hetero-integration of InP-based compound semiconductors on CMOS-compatible silicon is desirable for low-cost large-scale applications. Recently, an approach consisting of integrating a thin InP buffer layer onto a silicon (InPoSi) substrate through direct bonding, followed by epitaxial regrowth on the bonded layer has been developed. It allows us to avoid the two major defects origins, antiphase domains and lattice mismatch, of the direct III–V/Si epitaxial approach. The remaining challenge comes from the difference of coefficients of thermal expansion between InP and Si, leading to a compressively strained InP seed layer at growth temperature. The latter was assessed from the curvature signal registered by in situ metrology during etching on the InP layer at typical growth temperature (640 °C) using a PH3/CBr4 mixture. The thermal strain effects on different heterostructures grown by MOVPE on InPoSi were studied by microscopy, Atomic Force Microscopy (AFM), x-ray diffraction (XRD), and photoluminescence measurements. In particular, regularly undulating surface topology was observed by microscopy, which could be associated with a broadening of the XRD peaks for heterostructures thicker than 1.5 μm. Strain-free InP-based structures were grown on InPoSi by adding 1% of Ga to the InP bulk layers to form an In0.99Ga0.01P alloy lattice-matched at growth temperature to the compressively strained InP bonded seed. The undulation for this strain-engineered film was hardly noticeable by AFM and was, therefore, successfully limited.