Physics, modeling, and benchmarking of ULTRARAM: A compound semiconductor-based memory device

A Abhishek Kumar M Musaibh Farooq Dar (Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee 1 , Roorkee 247667,) P Peter D. Hodgson D Dominic Lane (School of Electrical and Mechanical Engineering, University of Adelaide , Adelaide, South Australia,) P Peter J. Carrington E Evangelia Delli R Richard Beanland S Shruti Mehrotra (DTE Device Modeling and CMC Lab at GlobalFoundries 6 , Bengaluru 560045,) M Manus Hayne (Department of Physics, Lancaster University 2 , Lancaster LA1 4YB,) A Avirup Dasgupta (Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee 4 , Roorkee 247667,)

Abstract

ULTRARAM is a promising emerging memory exhibiting high endurance, long retention, and ultra-low switching energy per unit area. This compound semiconductor-based non-volatile memory utilizes triple barrier resonant tunneling (TBRT) through InAs/AlSb heterostructures. In this work, we have proposed a physics-based compact model of ULTRARAM memory device that captures the real-time trapping/de-trapping of charges in the floating gate and used to calculate the device characteristics. In addition, we have performed numerical simulations of the TBRT stack using the Schrödinger equation inside the quantum well with mono-layer (∼0.6 nm) variations to check the impact on memory characteristics of the device. Array-level simulations and benchmarking highlight the promise of this technology.

Article Details

Volume / Issue Vol. 138, Issue 9
Published September 07, 2025
ISSN 0021-8979
Publisher American Institute of Physics

Journal Info

Journal of Applied Physics

American Institute of Physics

ISSN: 0021-8979 Physical Sciences

Authors (10)

A

Abhishek Kumar

M

Musaibh Farooq Dar

Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee 1 , Roorkee 247667,

P

Peter D. Hodgson

D

Dominic Lane

School of Electrical and Mechanical Engineering, University of Adelaide , Adelaide, South Australia,

P

Peter J. Carrington

E

Evangelia Delli

R

Richard Beanland

S

Shruti Mehrotra

DTE Device Modeling and CMC Lab at GlobalFoundries 6 , Bengaluru 560045,

M

Manus Hayne

Department of Physics, Lancaster University 2 , Lancaster LA1 4YB,

A

Avirup Dasgupta

Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee 4 , Roorkee 247667,