Modeling total ionizing dose effects in fully-depleted silicon-on-insulator technology: Bridging device degradation to radiation-hardened circuit design

Abstract

While a fully depleted silicon-on-insulator (FDSOI) metal–oxide–semiconductor field-effect transistor (MOSFET) exhibits superior immunity to single event effects through buried oxide layer isolation, its vulnerability to total ionizing dose (TID) effects poses significant reliability challenges in radiation-intensive applications. This work aims to bridge device-level performance degradation mechanisms to circuit-level reliability prediction through modeling TID effects in FDSOI technology. A physics-based TID effects model is developed to quantify the dependence of radiation-induced trapped charge density on cumulative dose and bias condition. The model is then integrated into the industry-standard FDSOI compact model BSIM-IMG through modified surface potential equations, enabling accurate prediction of a TID-induced threshold voltage shift and leakage current elevation. Credibility of the proposed model is verified through comparative analysis with the experimental current–voltage characteristics of devices measured at varying radiation doses. Key radiation-related parameters, including radiation-induced trapped charge density and a mobility degradation parameter, are extracted, enabling predictive simulation of FDSOI ring oscillator circuit performance degradation under ionizing radiation conditions. The feasibility of back-gate biasing to mitigate TID effects in the ring oscillator circuit is demonstrated, underscoring its potential as a circuit-level solution for radiation-hardened designs.