Modeling threading dislocation density evolution in Ge/Si during cyclic annealing

X Xuanchang Zhang (Department of Electronic and Electrical Engineering, University College London 1 , Torrington Place, London WC1E 7JE,) H Hui Jia H Haotian Zeng X Xueying Yu M Mateus G. Masteghin (DTU Nanolab, Technical University of Denmark 2 , Fysikvej, Kongens Lyngby 2800,) M Mengxun Bai H Hexing Wang (Department of Electronic and Electrical Engineering, University College London 1 , Torrington Place, London WC1E 7JE,) D Danqi Lei (Department of Electronic and Electrical Engineering, University College London 1 , Torrington Place, London WC1E 7JE,) H Huiwen Deng H Huiyun Liu M Mingchu Tang

Abstract

A compact kinetic framework is developed to describe threading dislocation evolution in Ge/Si buffers by linking the final dislocation density to the initial defect level and an Arrhenius-weighted thermal budget that captures the combined effects of temperature, annealing time, and layer geometry. Despite extensive experimental progress in Ge-on-Si integration, optimization of growth and annealing parameters remains largely empirical, owing to the lack of a framework connecting processing conditions to defect evolution. Calibrated against electron channeling contrast imaging measurements from undoped and Sb-doped Ge/Si buffers with different annealing cycle counts, the model captures the overall reduction and saturation trends across the wafer set. This compact framework provides a practical means of assessing how initial defect density and accumulated thermal exposure influence final threading dislocation levels in thin Ge/Si buffers.

Article Details

Volume / Issue Vol. 140, Issue 1
Published July 07, 2026
ISSN 0021-8979
Publisher American Institute of Physics

Journal Info

Journal of Applied Physics

American Institute of Physics

ISSN: 0021-8979 Physical Sciences

Authors (11)

X

Xuanchang Zhang

Department of Electronic and Electrical Engineering, University College London 1 , Torrington Place, London WC1E 7JE,

H

Hui Jia

H

Haotian Zeng

X

Xueying Yu

M

Mateus G. Masteghin

DTU Nanolab, Technical University of Denmark 2 , Fysikvej, Kongens Lyngby 2800,

M

Mengxun Bai

H

Hexing Wang

Department of Electronic and Electrical Engineering, University College London 1 , Torrington Place, London WC1E 7JE,

D

Danqi Lei

Department of Electronic and Electrical Engineering, University College London 1 , Torrington Place, London WC1E 7JE,

H

Huiwen Deng

H

Huiyun Liu

M

Mingchu Tang