Modeling the charging effect of the hardmask and silicon substrate during plasma etching in advanced nodes
Abstract
Profile non-idealities after plasma etching negatively affect the performance of advanced node devices. The charging effect is a well-known mechanism affecting the hardmask and substrate profiles. Unfortunately, directly characterizing this phenomenon in practical processes is extremely challenging. In this article, we propose a novel etching model to overcome this challenge by incorporating algorithms that simultaneously account for charging effects and particle reflection mechanisms. The model is able to reproduce the real-time profile evolution of both hardmask and substrate layers in an advanced nanoscale etching process. We calculate the electric field distribution induced by the surface charges accumulated on the hardmask, which affects both the trajectory of individual incident ions and the overall etching profiles. To validate our approach, we perform experiments of Si etching in Cl2 plasma and compare the simulated profiles with scanning electron microscope images. The model also identifies the impact of the charging effect on profile defects, such as mask faceting, substrate bowing, and microtrenching. This work provides insights into the charging effect mechanism and its influence on the etching profile, ultimately providing new knobs for advanced process development and optimization.
Article Details
Journal Info
Journal of Applied Physics
American Institute of Physics
Authors (8)
Yuxuan Zhai
State Key Laboratory of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences 1 , Beijing 100029,
Rui Ge
State Key Laboratory of Natural and Biomimetic Drugs, School of Pharmaceutical Sciences
Ziyi Hu
State Key Laboratory of Catalysis, Dalian Institute of Chemical Physics, Chinese Academy of Sciences, 457 Zhongshan Road, Dalian 116023, P. R. China
Junjie Li
Physics Department, University of California, San Diego, La Jolla, CA, USA.
Hua Shao
Jiawei Cheng
Lado Filipovic
CDL for Multi-Scale Process Modeling of Semiconductor Devices and Sensors, Institute for Microelectronics, TU Wien 3 , Viena 1040,
Rui Chen