Dielectric stacking-engineered scalable reconfigurable transistor platform for adaptive logic circuits

Abstract

Abstract Although reconfigurable van der Waals devices featuring flexible logic transformation offer a promising strategy toward adaptable architectures to accommodate diverse computational demands, reliable polarity control and scalable integration remain challenging. Here, we demonstrate a reconfigurable field-effect transistor based on the scalable dielectric oxide-van der Waals quasi-floating-gate configuration, enabling nonvolatile polarity switching and multi-state programmability. Charge trapping engineering in an atomic-layer Al 2 O 3 /HfO 2 /Al 2 O 3 dielectric stack achieves performance with nonvolatile conductance update (>6-bits for 1000 s), robust endurance (>3 × 10 5 cycles), and well-balanced electron/hole transport (current mismatch ratio ~ 1%). TCAD simulation and surface potential analysis reveal oxygen vacancies-dominated polarity switching dynamics. Using a silicon-compatible top-gate dielectric process and complementary design, diverse logic gates—including eight Boolean operations and seamless AND-OR-Invert/OR-AND-Invert transformations—are accommodated into compact reconfigurable logic-in-memory circuits. These transistors also simplify ternary content-addressable memory design, underscoring their potential for efficient logic-in-memory computing.