A compact and power efficient full adder-subtractor layout in QCA technology

Abstract

The pursuit of miniaturizing digital circuits and reducing power consumption has focused attention on non-traditional computing technologies. Among these technologies, quantum dot cellular automata (QCA) stand out as a promising alternative to conventional CMOS chips, offering high-density designs with minimal power dissipation. This paper presents a novel QCA layout that unifies full addition and subtraction operations within a single, compact structure. Simulation outcomes, derived through QCADesigner software, affirm the proposed circuit’s operational integrity, stable behaviour, and design efficiency. The proposed architecture demonstrates significant improvements, offering 6.7%, 25%, and 30% reductions in cell count, area, and cost, respectively, compared to the best-reported design. Furthermore, the total energy savings achieved by the proposed design are approximately 6%, 4%, and 6% at tunnel energies of 0.5 EK, 1 EK, and 1.5 EK, respectively, compared to its counterparts. This approach not only demonstrates functional versatility but exhibits high integration potential for larger quantum cellular automata-based computational units, representing a step forward in the development of efficient nanoscale computing architectures.